Inženýři elektrotechnici a energetici ve výzkumu a vývoji, IC Layout Engineer

Detail pozice:

She/He will be an active team player in the Application Oriented Chip (AOC) Design Center constituted in ST-Prague The candidate will be responsible of the Back-End of IC Design and actively participate in layout and verification of high performance, mixed signal IC´s for Power Management, Data Conversion, and Communications Circuits at transistor level layout in CMOS, BiCMOS, Bipolar and BCD Technologies Depending on experience and ability she/he will have the opportunity to contribute to grow in the AOC Layout Team to create Stand Alone Products such as converters, amplifiers, bandgaps references, high-speed transceivers, PWM drivers, and many other AOC.